for further information contact your local stmicroelectronics sales office. june 2013 docid024007 rev 2 1/4 4 stih253 advanced stb processor with integrated dvb-c/dvb-t/dvb-t2 demodulator data brief features integrated dvb-c, dvb-t and dvb-t2 demodulator and fec st40 applications cpu with 256 kbyte l2 cache ? 650 mhz delivering 1200 dmips 16-bit lmi supporting ddr3 ? up to 667 mhz (ddr3 1333) latest generation delta decoder with st231 core: ? decoding of h.264, mpeg2, vc-1 and avs hd or sd video streams 3dtv decoding and display, compatible with hdmi 1.4b extensive connectivity: ? two usb 2.0 ports ? ethernet mii/rmii/tmii port ?sd/emmc card port ? gen ii (3 gbit/s) esata port ?pci-e port secure boot from slc nand flash or serial nor flash low-power process and architecture integrated low power standby controller high-quality video resizing and de-interlacing targets two-layer pcbs for cost-effective zapper and stb applications integrated 10/100 ethernet mac and phy 2d graphics blitter advanced security package: pbga 27 x 27 mm 2 description the stih253 uses the latest process technology to provide a cost-effective, feature rich, highly integrated soc for set-top boxes (stbs). it is targeted at the advanced decoding stb market across cable, terrestrial and ip/hybrid networks, and is suitable for operator markets (with advanced security) and retail markets worldwide. jtag stb peripherals i/o resets analog out clocks modes pcm i/o s/pdif out external interrupts clock gen system serv peripherals ssc uart rtc pwm gpios ir/uhf connectivity st231 cpu blitter tile sram video planes graphic planes aux vdp dei, iqi dual denc teletext dacs hdmi 1.4b audio i/o display video i/o audio decoder st231 cpu video decoder emi spi system interfaces main vdp cpu/fpu mmu interrupts i cache d cache timer st40-300 debug stbus dual fdma l2 cache delta mu dual usb esata/pci-e sd-mmc/sdio pcm reader pcm players dacs vtgs analog video smartcard slc nand flash serial flash ci-plus cards ddr3 key scan transport streams parallel/serial in/out low power hdcp ethernet ddr3 lmi dvb-c/t/t2 i/q or transport demodulator hdmi stream 650 mhz standby controller transport security stfe stbe if in www.st.com
overview stih253 2/4 docid024007 rev 2 overview the stih253 offers current users of st?s growing family of advanced decoding ics enhancements in performance and features, enabling operators to offer consumers new multimedia-rich services and viewing experiences, including new 3dtv features. faster ddr3 memory is also supported, and the applications cpu benefits from an l2 cache. the stih253 keeps pace with the latest advanced security requirements of the main ca vendors, and an integrated standby controller enables the stih253 to target stringent low power regulations. features benefits integrated dvb-c, dvb-t and dvb-t2 demodulation and fecs. highly-integrated stb solution, reducing component count and manufacturing bom. st40 applications cpu, with 32ki and 32kd l1 caches and 256k l2 cache. high-performance processing for applications and middleware. integrated low power standby controller within its own power island. secure hibernation to, and fast resume from, very low power passive standby mode, targeting stb standby power < 0.5 w. latest generation of st's delta video decoder coupled with a high-quality video display pipeline (hqvdp). decoding of advanced high definition standards (mpeg2, h264, vc-1, avs) plus the performance and flexibility for web-based content decoding such as flash ? , divx?, mjpeg and real ? , without impacting applications cpu performance. dual usb 2.0 hosts, esata, ethernet mac with mii/rmii/tmii interfaces, pci-e, sd-mmc/sdio interface. extensive high-speed connectivity for the widest range of stb peripherals, such as flash drives, external hdds, ethernet, home network controllers (such as moca ? , wi-fi), docsis ? modem and memory cards. nocs3.0, nsk2.0 and dvb-csa3 ready. fully compliant with the latest advanced security requirements of ca vendors. ball compatible with other stih2xx family variants. single platform versatility across all networks (satellite, cable, terrestrial, ip).
docid024007 rev 2 3/4 stih253 revision history revision history table 1. document revision history date revision changes 11-dec-2012 1 initial release. 06-jun-2013 2 minor updates.
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